This invention relates to pixellated devices such as active matrix liquid crystal displays, and particularly to the transistor substrate, known as the active plate, used in the manufacture of such devices.
A liquid crystal display typically comprises an active plate and a passive plate between which liquid crystal material is sandwiched. The active plate comprises an array of transistor switching devices, typically with one transistor associated with each pixel of the display. Each pixel is also associated with a pixel electrode on the active plate to which a signal is applied for controlling the brightness of the individual pixel.
FIG. 1 shows the electrical components which make up the pixels of one known example of active plate of an LCD. The pixels are arranged in rows and columns. The row conductor 10 of a pixel is connected to the gate of the TFT 12, and the column electrode 14 is coupled to the source. The liquid crystal material provided over the pixel effectively defines a liquid crystal cell 16 which extends between the drain of the transistor 12 and a common ground plane 18. An optional pixel storage capacitor 20 is connected between the drain of the transistor 12 and the row conductor 10 associated with an adjacent row of pixels.
For transmissive displays, a large area of the active plate is at least partially transparent, and this is required because this type of display is illuminated by a back light. In these display devices, the pixel electrode must be transparent, whereas row and column conductors are formed as metallic lines which are opaque. Metallic layers, such as chromium, aluminium, alloys or multilayer structures are used for the row and column conductors because of the high conductivity, which improves the device performance. The conductivity of the lines (usually the column lines) to which the pixel drive signals are applied is particularly important in large displays, because a sizeable voltage drop occurs over the length of the line, making it impossible to drive uniformly all pixels along the line (column).
A problem with the use of metallic column conductors is that separate deposition and lithographic procedures are required to form the column conductors and the pixel electrodes. The pixel electrodes must be transparent, and are typically formed from a transparent conductive oxide film. It is well known that the lithography steps in the manufacturing process are a major contributing factor to the expense of the manufacturing process. Each lithographic step can be considered to reduce the yield of the process, as well as increasing the cost.
The conventional manufacturing process for the active plate of an LCD is a five mask process. With reference to the bottom gate TFT LCD active plate shown in FIG. 2, the process steps, each requiring a separate mask definition, are:
(i) defining the gate 22 (which is part of the row conductor) over the substrate 21;
(ii) defining the amorphous silicon island (which overlies a gate dielectric 23 which covers the entire structure), comprising a lower intrinsic layer 24 and an upper doped contact layer 26;
(iii) defining the metallic source 28, drain 30 and column electrode 32;
(iv) defining a contact hole 34 in a passivation layer 36 which covers the entire substrate; and
(v) defining the transparent pixel electrode 38 which contacts the drain 10 through the hole 34.
The capacitor shown in FIG. 1 may simply be formed from the gate dielectric by providing an area of overlap of one pixel electrode with a portion of the row/gate conductor of the adjacent row.
There have been various proposals to reduce the number of lithography steps, and thereby the mask count, of the manufacture process in order to reduce cost and increase yield.
For example, it has been proposed to form the column conductors from the same transparent conductive oxide film as the pixel electrode, so that these components of the pixel structure can be deposited and patterned together. Additional measures can result in a two mask process, and this is explained with reference to the bottom gate TFT LCD active plate shown in FIG. 3. The process steps, each requiring a separate mask definition, are:
(i) defining the gate 22 (and row conductors); and
(ii) defining the transparent column electrode 32 (which also forms the TFT source 28) and the pixel electrode 38 (which also forms the TFT drain 30).
The definition of the semiconductor island 24, 26 can be achieved by a self-aligned process using the gate 22, for example by using UV exposure through the substrate. Of course, the semiconductor could equally be formed with a third mask step (between steps (i) and (ii) above). In the periphery of the array, the gate dielectric 23 is etched away using a low-precision stage, to allow contact to the gate lines at the periphery of the display.
In this structure, the high resistivity of the transparent conductive oxide film used for the column lines prevents the use of the structure in large (TV-sized) displays.
For this reason, there are further proposals to treat the column conductor area of the layer to increase the conductivity, whilst not affecting the transparency of the pixel electrode. For example, the article xe2x80x9cConductivity Enhancement of Transparent Electrode by Side-Wall Copper Electroplatingxe2x80x9d, J. Liu et al, SID 93 Digest, page 554 discloses a method of enhancing the conductivity by electroplating a copper bus to the side of the metal oxide column line. The process involves an incomplete etching process to leave metal oxide residues, which act as seeds for the copper growth. The process is complicated and difficult to control. In addition, the copper bus will surround the source and drain electrodes, and there is a risk of shorts between the source and drain resulting from fast lateral copper growth when forming the bus. The copper bus around the source and drain electrodes also influences the channel length of the TFT and therefore makes the TFT characteristics less predictable.
WO 99/59024 discloses a method for enhancing the conductivity of a transparent electrode by providing patterned metallic layers adjacent to the transparent electrodes.
There is still a need for a simple process for increasing the conductivity of a transparent metal oxide layer, such as ITO, without increasing dramatically the complexity of the process, for application in active matrix LCD manufacture.
According to a first aspect of the invention, there is provided a method of forming a pixellated device, comprising:
defining pixel areas, each pixel area comprising:
a thin film transistor having a gate conductor and source and drain conductors separated by a gate insulator and a semiconductor channel;
a pixel electrode; and
a line conductor associated with the source or drain conductor,
wherein the source and drain conductors, pixel electrodes and line conductors are formed by depositing and patterning a transparent conductor layer and by selectively electroplating areas of the transparent conductor layer to form a metallic layer for reducing the resistivity of the transparent conductor layer, the areas including the line conductors and excluding the source and drain conductors.
Preferably, the electroplated areas comprise edge regions of the line conductors, and may exclude the pixel electrodes.
According to a second aspect of the invention, there is provided a method of forming a pixellated device, comprising:
defining pixel areas, each pixel area comprising:
a thin film transistor having a gate conductor and source and drain conductors separated by a gate insulator and a semiconductor channel;
a pixel electrode; and
a line conductor associated with the source or drain conductor,
wherein the source and drain conductors, pixel electrodes and line conductors are formed by depositing and patterning a transparent conductor layer and by selectively plating upper surface areas of the transparent conductor layer using an electroless plating step to form a metallic layer for reducing the resistivity of the transparent conductor layer, the areas including the line conductors and excluding the source and drain conductors.
The methods of the invention enable the column conductors (the line conductors) to be treated to reduce the resistivity, but without altering the channel length of the transistor because the source and drain parts of the layer are shielded from the plating process. The areas may be at the edge of the transparent conductor layer (and deposited by electroplating) or over the top (and deposited by electroless plating).
The methods of the invention can be used in display devices having top or bottom gate transistors. For bottom gate transistors, the method comprises:
depositing and patterning a gate conductor layer over an insulating substrate;
depositing a gate insulator layer over the patterned gate conductor layer;
depositing a silicon layer over the gate insulator layer; and
depositing and patterning the transparent conductor layer.
In one example, the selective plating comprises:
printing a shielding layer for shielding the source and drain conductors; and
plating the non-shielded areas of the transparent conductor layer to form a metallic layer for reducing the resistivity of the non-shielded areas.
In another example, the selective plating comprises:
plating the transparent conductor layer to form a metallic layer for reducing the resistivity;
printing a shielding layer and removing the metallic layer of the unshielded area.
In this method, the resist layer remains over the column lines which reduces the risk of shorts between columns.
The transparent conductor layer preferably comprises a conductive oxide, for example ITO, which may be deposited by printing.
The active plate may be formed by a two mask process. In this case, the gate conductor is deposited and patterned with a first lithographic process and the transparent conductor layer defining source and drain conductors and pixel electrodes is deposited and patterned with a second lithographic process, the silicon layer being self aligned to the gate conductor.
The method of the invention are preferably for forming the active plate of an active matrix liquid crystal display.
The invention also provides a pixellated device, comprising:
pixel areas, each pixel area comprising:
a thin film transistor having a gate conductor and source and drain conductors separated by a gate insulator and a semiconductor channel;
a pixel electrode; and
a column conductor associated with the source or drain conductor,
wherein the source and drain conductors, the column conductors and the pixel electrodes are defined by a transparent conductor layer having a metallic layer in contact with a portion of the transparent conductor layer, the portion including the column conductors and excluding the source and drain conductors.
By avoiding deposition of the metallic layer in the region of the source and drain, it is possible to prevent the plating of the metallic layer influencing the transistor characteristics, which may otherwise arise for example as a result of variation of the channel length.
The device preferably comprises the active plate of an active matrix liquid crystal display. The invention also provides an active matrix liquid crystal display comprising this active plate, a passive plate, and a layer of liquid crystal material sandwiched between the active and passive plates.